Discusses how a set of instructions would execute through a classic MIPS-like 5-stage pipelined processor. Also looks at calculating the average CPI for the instruction sequence.
NOTE: This example assumes there is NO branch delay slot.
There is a version, • 5-Stage Pipeline Proce... , with a small update around 7:00 to make the written text to more accurately reflect what is said.
Негізгі бет 5-Stage Pipeline Processor Execution Example
Пікірлер: 66