Bar-Ilan University 83-612: Digital VLSI Design
This is Lecture 6 of the Digital VLSI Design course at Bar-Ilan University. In this course, I cover the basics of Chip Implementation, from designing the logic (RTL) to providing a layout ready for fabrication (GDS).
Lecture 6 covers the traversal from the logical domain of RTL and Synthesis to the Physical Implementation stages of Floorplanning, Placement and Routing. This lecture focuses on Floorplanning, including Power Planning and a bit about Multi-Voltage and Hierarchical design.
Lecture 6c explains the process of floorplanning, one of the most important parts of the backend design, including methodologies, tips, and good practice when building a floorplan.
Lecture slides can be found on the EnICS Labs web site at:
enicslabs.com/...
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Prof. Adam Teman
Emerging nanoscaled Integrated Circuits and Systems (EnICS) Labs
Faculty of Engineering, Bar-Ilan University
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