03:31 CD Formula 04:14 k1 05:06 k1 Fundamental Limit 09:18 Alignment Mark 11:25 Overlay 11:47 Scribe Lane 12:07 Box in Box
@zai758
3 жыл бұрын
Thanks Zeiss Group for great videos. I have a question: Why does the NA for EUV has to be considerably less than the NXT? I do understand that the factor of lambda/NA for EUV is much smaller (factor of 5) compared to DUV, but is there some design constraint that forces EUV to have such a smaller NA?
@zeissgroup
3 жыл бұрын
Thanks for the positive feedback and your interest. We talked to our experts about your questions: In principle, in EUV the same NA as on NXT could be achieved. (Except for NA > 1, as there is no known immersion medium that would transmit EUV light). The limitations are more on the practical and economic side. NXT systems use refractive optics, that means the last lens element can be very close to the wafer and even for a large NA, say > 0.9, the diameter of this lens can still be only a little larger then the image field. EUV optics can only be built with mirrors. Consequently the last mirror before the light hits the wafer must receive the incoming light from the same side as the wafer and there are things in the way, for example the wafer stage and the wafer itself. Therefore the mirror needs to be relatively far away from the image field and for a high NA this leads very quickly to extremely large mirrors. Another constraint is the lens design. When going to higher NA, the task of making very low aberrations for every point in the imaging field becomes exponentially more difficult and requires the addition of more surfaces (mirrors). More mirrors however - given that the maximum reflectivity of even a perfect multilayer is just slightly larger than 70% - will lead to a reduction of transmission and thus would require even higher power light sources. The current NA=0.33 and the next generation high NA=0.55 (Proceedings Volume 10957, Extreme Ultraviolet (EUV) Lithography X; 1095709 (2019) doi.org/10.1117/12.2514952) result from a very thorough thought process that considered industry requirements, manufacturability, source power, lens design aspects and cost.
@morkovija
2 жыл бұрын
@@zeissgroup if only more of the internet was more like your comment - we would live in a different world. Thank you for sharing the knowledge
@evilMANGO-ec7mx
3 жыл бұрын
It’s exciting how you guys are overcoming chaos!
@geoffreywilliams7705
2 жыл бұрын
Great explanation ..
@Paul-e9x4h
21 күн бұрын
Banyak variasi microchips yang dihasilkan dari teknologi nanoelectron dalam perangkat elektronik yang menghasilkan gambar beresolusi tinggi dengan kalibrasi yang diinginkan . Dalam dasar dasar photolitograpi akan lebih mudah lagi mentranformasikannya ke dalam desain desain grafis pada bidang yang bertautan dengan utilitas peralatan yang tercipta untuk jangkauan yang semakin meluas dan multiguna
@dayglo98
3 жыл бұрын
You are a very good presenter, thanks !
@kabangukabangu2529
2 жыл бұрын
Very good presentation 👏🏿
@VicenteSchmitt
3 жыл бұрын
Really interesting!
@liorktl
2 жыл бұрын
You mentioned that in nanometers the substance is like Jell O. Can you better explain that? Why? Is this just an analogy or is it real? Thank you.
@zeissgroup
2 жыл бұрын
Thanks for your interest. We talked to our Semiconductor Manufacturing Technology experts: The intent of the statement is that materials are not literally jello, but that they are not as solid as we are used to at the macro level. When you get down to nm, everything changes shape and size under changes in temperature, pressure, and vibration.
@MrMukundrl
2 жыл бұрын
Hello Team, Can you explain how alignment marks come on wafer? Is it through ASML machines?
@zeissgroup
2 жыл бұрын
Thank you for your question. For more detailed information on the topic of alignment marks, we recommend the following paper from SPIE Photomask Technology + EUV Lithography from 2019 - enjoy reading it: www.zeiss.com/content/dam/smt/downloads/products_and_solutions/photomask-systems/Publications/vol11148pt20191114811.pdf
@nerochu-luntai6205
4 жыл бұрын
As a EE major senior college student, I have to say this is what I wanna learn real real. Any US engineering college teaching this except MIT UCLA(I didnt get that high kind GPA)?
@pjoh7
4 жыл бұрын
Yes, most EE courses have a few electives in Semiconductor Manufacturing. I specialized in some of them in my BS EE degree at Texas State University - San Marcos. Was lucky to get a chance to also work alongside these tools in FAB25 & AMAT at Austin.
@nerochu-luntai6205
4 жыл бұрын
pjoh7 Austin?sounds like ur GPA must higher than 3.5 lol
@pjoh7
4 жыл бұрын
Nero Dai not quite. I fluffed through college sadly, made out with a 3.22 😝 Anyway, learned so much more outside college and in the field organically, and of course - through the internet!
@nerochu-luntai6205
4 жыл бұрын
pjoh7 u guys all smart than me, I study BS ECE more than 7 years. I will graduated at this year. one major and two minor. but GPA only get 2.8. we are not same kind student, bro.
@kingsman3087
3 жыл бұрын
i wonder if the aliens observing us are impressed
@kennethhernandez3584
17 күн бұрын
Can this slide deck be shared?
@TA1FMY
3 жыл бұрын
beyler bu işleri öğrenmemiz lazım değerlenecek bak bunlar yazıyorum buraya vesselam
@ONRIPRESENCE
Жыл бұрын
I see some Blender animation going on :D (I could be wrong).
@jetli4696
2 жыл бұрын
why dose the mask or reticle moveduring the exposure process??
@WhatYouHaventSeen
Жыл бұрын
I believe you are referring to the process of wafer stepping. See here for more info: en.m.wikipedia.org/wiki/Stepper
@luigicrispo6853
3 жыл бұрын
do you have a link n the vide you were referring to at 8:20 ?
@zeissgroup
3 жыл бұрын
Dear Luigi thanks for your interest. Unfortunately we cannot share the video. Thanks for your understanding. Best regards
@luigicrispo6853
3 жыл бұрын
@@zeissgroup not even on my ASML email?
@zeissgroup
3 жыл бұрын
Dear Luigi, unfortunately, we are not allowed to share the file with third parties. Best regards
@Mike.Freeman
3 жыл бұрын
fascinating
@sonopit
4 жыл бұрын
Who design the circuit?
@PaulusdeKenezy
3 жыл бұрын
Me.
@Channel-gv3sr
Жыл бұрын
EDA ( Eleftronic Design Automation)-Software or Intel, Nvidia, ARM, AMD, Apple, etc.
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