Bus Architecture: I2C uses a master-slave architecture where multiple slave devices are connected to one or more master devices. The bus consists of two lines: SDA (Serial Data Line) and SCL (Serial Clock Line).
Master and Slave Devices: The master device initiates communication and generates the clock signal (SCL). The slave devices respond to commands from the master.
Start and Stop Conditions: Communication on the I2C bus begins with a START condition (a high-to-low transition on the SDA line while SCL is high) and ends with a STOP condition (a low-to-high transition on the SDA line while SCL is high).
Addressing: Each slave device on the bus has a unique address. The master addresses a particular slave device by sending its address during the transmission.
Data Transfer: Data transfer occurs in bytes. The master sends data to or requests data from the slave devices.
Acknowledge (ACK): After each byte of data is transferred, the receiver (either master or slave) sends an acknowledgement bit (ACK) to the transmitter to confirm the successful receipt of the byte.
Clock Synchronization: Both the master and slave devices synchronize their clocks to the SCL line. Data is transferred bit by bit, and synchronized with the SCL signal.
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