Excellent video. Can you make a tutorial showing an interaction between DMA and Processor, or may be with more other peripherals?
@RenzymEducation
Жыл бұрын
Thanks. If you understand Urdu/Hindi, I touched DMAs in two contexts earlier in Urdu: 1- In Zynq FPGAs where an ARM core can read/write using AXI DMA cores: kzitem.info/news/bejne/1Y-M2YWinKqqqY4 2- In computer architecture, in synchronization and cache coherence topics: kzitem.info/news/bejne/w2mAq5Wcp5yZkqA
@havingf
Жыл бұрын
great video. can you please share the other video too as you said will share it in the description
@RenzymEducation
Жыл бұрын
I shareds link to Verilog video, Urdu version of processor design, and BRAM related video in video description. Did I refer some other video as well?
@havingf
Жыл бұрын
@@RenzymEducation found it thank you.
@madhusudaneyunni7816
Жыл бұрын
Good presentation. Can you provide the link for tool? Which video do you provide link for source files?
@RenzymEducation
Жыл бұрын
Here is video about installation of icarus verilog (the tool that I used): kzitem.info/news/bejne/umaYtIqJrYygnmk Here is link to source code: github.com/yasir-javed/simple_processor Both links are also in video description
@marwanal-yoonus280
Жыл бұрын
Dear Sir Thank you very much for this helpful video Please, I try to write the following Verilog code in Vivado, the synthesis process is OK but when I want to implement it an error signal appear !! module Tog_not (hsync, EOL, q); input hsync, EOL; output reg q; always @ (posedge hsync) begin q
@RenzymEducation
Жыл бұрын
Here q is derived from two posedge blocks. If you wanted to make two different registers they should have had different names. If you intended to make single register then it should have been same posedge block. Also you are using two different clocks (hsync and EOL), from names both seem to be control signals instead of clocks. My guess is that your system might have a different clock and you might wanted to set q on hsync and reset it on EOL. Always start with a hardware design first instead of writing code on the fly. It can lead to hardware that doesn't work as expected
@marwanal-yoonus280
Жыл бұрын
@@RenzymEducation Thank you very much for your clear answer.
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