Prof. Daniel Bliss
Director of the Center for Wireless Information Systems and Computational Architectures
Professor, School of Electrical, Computer, and Energy Engineering
Arizona State University
Abstract:
After providing a brief introductory survey of recent and current efforts at the Center for Wireless Information Systems and Computational Architectures (WISCA), and observations on the future of RF systems, we introduce our efforts on the next generation of coarse-scale heterogenous processor development. On our project - entitled Domain-Focused Advanced Software-Reconfigurable Heterogeneous (DASH)-System-on-Chip (SoC) that operates under the DARPA Domain-Specific System-on-Chip (DSSoC) program - we are constructing both a development framework and an example SoC. Our SoC and framework will provide efficiency that approaches that of full-custom integrated circuits while enabling ease of programming that is similar to that of traditional scalar processors. To achieve this goal, we pursue significant progress in application ontological analysis, program and debugging software tools, intelligent on-chip resource management, flexible high-performance on-chip networking, and advanced task-specific accelerators. Additionally, to assure usefulness to DoD RF applications, we work with multiple traditional defense contractors on transitioning the DASH-SoC to example systems. We lead a broad team from academia, commercial industry, and traditional defense contractors.
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