49:30 to be fair, it's not actually the DRAM that's hitting the bandwidth wall but rather the memory interconnect (busses) between processors and DRAM, which is why HBM was developped but also why some research projects try to combine in-memory compute architectures with chip or chiplet cluster designs.
@Steamrick
2 жыл бұрын
The entire spec list reads more like a wish list than a finished product. I seriously doubt that those clock targets can be cooled without on-die watercooling - and that would be yet another thing that, as far as I know, has never been done at mass production scale.
@BusAlexey
2 жыл бұрын
Has tachyum shown anything besides powerpoint slides?
@TechTechPotato
2 жыл бұрын
FPGA PoC and development systems right now. The people behind it have a strong history of delivering, if that's any consolation.
@petithor
2 жыл бұрын
@@TechTechPotato sounds like intel
@aninditabasak7694
2 жыл бұрын
@@petithor Except that Tachyum is a small startup while Intel is a giant established company.
@petithor
2 жыл бұрын
@@aninditabasak7694 Thank you captain obvious.
@modernsolutions6631
2 жыл бұрын
Yes but nothing which demonstrates they can accomplish their HPC ambitions.
@gmt-yt
2 жыл бұрын
But.. how? Is x86/arm technical debt so great that a from-scratch ISA and shallow pipeline lands you here on the first 5nm tape? Or is there some kind of unexplained proprietary magic new design principle at play? One potential win: shallow pipelines, 1 thread per core (
@Brians256
2 жыл бұрын
Excellent coverage of the details and a very fair analysis. Well done, gents.
@Trick-Framed
2 жыл бұрын
I'm currently designing a chip for my butt-wiping robot. Having issues training the AI and am currently in the hospital with a hole in my back from where it tried to wipe me with sand paper. And I still do not know where it got the sand paper!
@SebLukaTech
2 жыл бұрын
What grit was the sandpaper for the anal cleansing exercise? & Does this robot of yours also perform an OR any anal bleaching services? This may improve your humor & outlook on life and aid in freeing up your inhibition's, perhaps, even in relation too innovative products in Technology today.
@Trick-Framed
2 жыл бұрын
@@SebLukaTech 320, it was wet sand thank God. Could have been so much worse. Bleaching comes after it learns how to bidet correctly. In need of a female volunteer for that .... then we train the AI for bleaching and hair removal as well as dermatological skills to keep those unsightlies gone.
@radivojevasiljevic3145
2 жыл бұрын
You should try polishing with chromium oxide!
@christopherjackson2157
2 жыл бұрын
Really glad they dropped vliw. Audacious design. Very impressed by chips and chees. Will follow.
@octagonPerfectionist
2 жыл бұрын
reminded of nvidia's denver cores - those were an absolute nightmare! perhaps it was just a poor implementation but i hated my nexus 9. 2GB was not nearly enough RAM at the time and the instruction cache it needed reduced that even more - it overheated like crazy and was incredibly slow most of the time.
@janwaldner246
2 жыл бұрын
As a chip designer myself, I have a humble comment regarding the discussion at the end of the video ("Chip design is hard"). I believe that Rado has quite some background and experience from his previous projects, but I must say that his team is very inexperienced when it comes to chip design of this complexity. According to some of my friends (not even digital designers) and including myself as well, Tachyum was actually trying to hire a lot of experienced chip designers in Slovakia but there is a lack (i.e none) of local engineering resources and many of the Slovak expats refused to join Tachyum. Maybe because of the ambitious/overblown statements? I'd bet that they will not pull this off in such a very competitive environment where topics like processor validation demand extremely experienced workforce. Tachyum certainly does not have such a workforce. I hope I'm wrong in the end...
@axiom1650
Жыл бұрын
Given that 1 year has passed and not much has been released, I'm afraid you'll be right.
@El.Duder-ino
2 жыл бұрын
Thank you for this deep dive! I am very proud Slovak scientist/engineer is now being looked at. Rado is a great example and role model to everybody in the R&D and science field! I hope and keep fingers croxxed that Prodigy will truly deliver silicon semiconductor prodigy to the market!
@jrherita
2 жыл бұрын
43:15 - the old Geek in me likes seeing IPC references for K5 vs. P5 (Pentium). I hope Chips and Cheese eventually writes articles comparing IPC of some more ancient processors.. i.e. 486 vs 386, 386 vs 286 on 16-bit code (I think the same IPC), etc..
@capability-snob
2 жыл бұрын
This sounds great, thanks for bringing it up! I'll have to dig into the MMU architecture to confirm it WFM but it looks like it's time to start saving!
@FrankHarwald
2 жыл бұрын
It's this generation's Larrabee - I agree, it at least looks like it! Related: Remember the 2015 NEO Chip from REX Computing? Last thing I've heard from them was 2017/2018 & then nothing - no actual prototype, no FPGA, no libraries, no dev kits, no emulation support - I'm really wondering what happened to them.
@heronlabs8362
2 жыл бұрын
Awesome deep dive! We need more overviews like this to digest all the new chips being worked on.
@waldmensch2010
2 жыл бұрын
I want to buy this crazy stuff. thanks for this amazing deep dive!
@mrstanlez
6 ай бұрын
If this CPU will be available on market, I will saw at specs really up to every details. Maybe dreams come true.
@capability-snob
2 жыл бұрын
VLIW may have been a mistake in the IA-64 architecture, but that's really not what /killed/ Itanium. Two bigger mistakes are the market placement out of reach of people who would use them and dedicating hardware to x86 decode and cache instead of out of order execution, which was already doing well in the pentium pro.
@FrankHarwald
2 жыл бұрын
also the way that Itanium handles speculative execution mispredictions is a huge performance killer. Also VLIW & EPIC architectures are mostly efficient for code with lots of parallelism like HPC, engineering & media application, but instead they targetted it for business database applications which in reality does have too much pointer chasing & other indirect or difficult to predict memory access patterns.
@capability-snob
2 жыл бұрын
@@FrankHarwald Not sure exactly which speculation failures you're referring to, but I'm going to guess that since you mention pointer chasing you're talking about the cost of a control path mispredict caused by a cache miss. It's true there are designs that handle this better for the same die cost - notably high order SMT - but the reason the cost on Itanium is so high is not because of some design flaw, but rather the outrageous issue width. If your x86_64 processor mispredicts for 200 cycles waiting on the cache, you've lost the opportunity to execute 350 instructions or so. On a recent itanium, you've lost 2400 instructions in the same time period, because every wasted cycle is 12 instructions that couldn't be executed. I'm not sure that is really a bad thing - it's more exaggerated because it's more powerful.
@radivojevasiljevic3145
2 жыл бұрын
@@capability-snob actually, Itanium had whole bunch of problems, both in architecture and in implementations. Architecture: emphasis on more flexibility than traditional VLIW (two bundles, 3 op each, encoding of independent instructions etc, thus already more complications), huge emphasis on software pipelining with rotating register files and full predication (works like charm one some type of loops but much more fragile than loop unrolling), overall fairly complicated architecture (pick any book about it and even most complicated RISC like POWER looks like piece of cake). Full predication was much hyped in mid 90s as way to remove hard to predict branches (most of data dependent branches are such), but it turned out that those studies were too optimistic and that gains are much lower, while overhead is significant, along with question full vs partial predication (which is a bit less powerful but can be inserted in any RISC architecture very easy, as was seen in mid 90s). And consequence was even higher pressure on compilers to get solid performance. But static nature of VLIW/EPIC means compiler have to work based on profiles and profiling tools are probably one of the most underutilized tools in traditional toolbox, they are there and gather dust. Implementations: first Itanium was pure disaster, just look at both low frequency and huge latency (5 cycles for fused multiply add), Itanium 2 was much better, BUT, and this is probably one of reasons why it failed: it had very low bandwidth. Second reason, there was no "Celeron Itanium" and finally Opteron came out, not just with easy 64b migration path (software is different question), lower latency (partially due simple cache subsystem) and comparable bandwidth, thus much better balanced and more useful in situations where even large caches don't really work. Data from HPC Challange benchmarks and old Top500 give very interesting picture. Implementation shortcomings had nothing with VLIWness/EPICness of Itanium per se, but I guess that Intel after Itanium 2 (even then is questionable) never done aggressive custom design comparable to Pentium4, too much work for too small market. On positive side, but not much VLIW related, Itanium had some great floating point things, which were mostly missed by general IT public. You are wrong about penalties, then old PentiumPro was 3 wide superscalar, so Itanium wasn't that wide and it had shallow pipeline, even compared to Pentium3 and Athlon, not to mention Pentium4. In case of random branching code which couldn't be predicted, Itanium would suck, but some applies to any superscalar. BTW, are you comparing instruction cache miss or branch missprediction? Huge L1 instruction cache misses are rare, and for data, it had large L2 and L3 caches as backups. Plus frequency was much lower so there is no chance that cache miss on Itanium is much more expensive than on P3/P4/Opteron in number of cycles. Overall Itanium's main problem was that in worst case (and not so worst) scenarios it was comparable to much cheaper CPUs which had much larger ecosystem. For something like "sustained 250 MFLOP", if 1000$ Opteron and 5000$ Itanium are the same, answer is very obvious which will be customers' choice.
@mtrezaie
2 жыл бұрын
This was really fun. Thanks.
@JohnDoe4321
2 жыл бұрын
VLIW is the architecture of the future. And always will be. 😀
@Apokalupt0
2 жыл бұрын
Best collab
@samikmaiti9339
Жыл бұрын
Is this good for (OpenFoam )high-performance computing?
@salty4
2 жыл бұрын
perfect collaboration
@eddieobscurant
2 жыл бұрын
Nice save for Genoa 5.5Ghz
@josephkelly4893
2 жыл бұрын
Cool video gents. Cheers Ian
@denvera1g1
2 жыл бұрын
1:00:00 I've clocked my fabric on two different 5700G to 2.466Ghz and memory at 4933MT/s CL17-17-17-28 with improved sub timings that i dont remember. This made it perform much closer to the 5700x than the 3800x, but nothing makes up for a lack of cache other than a good architecture. Of note this required disabling the iGPU but other than that the chip ran stable for the day i was testing them. with single rank memory i saw bandwidth around 74GB/s and 49ns of overall latency in aida64. Scale that up to 16 channels with dual rank DDR5 7200 i could see
@Shadowed007
2 жыл бұрын
They could have taken all the money and spent it on RISC-V architecture just like MIPS,SiFive, and Imagination,instead of doing slides and gymnastics.
@PainterVierax
2 жыл бұрын
Facts.
@Brians256
2 жыл бұрын
Jim Keller said something to the effect that you can't get large improvements without large changes. Every once in a while, you have to rip up the foundation and design for a more ambitious result. Also, customers simply aren't going to purchase a chip from an upstart without a very large advantage. The risk and lack of infrastructure is a big impediment. On the other hand, it's a tough goal to make all that happen with the limited resources for Tachyum. Very tough.
@ewetzlma
2 жыл бұрын
uhm.. does "pipe dream" and "vaporware" ring a bell?
@ewetzlma
2 жыл бұрын
I forgot SCAM of course. It shocks me that you have jumped on the hypetrain. You should know better than most of us that this is most likely all BS and a big hoax.
@ole7736
2 жыл бұрын
How do you do this outline filter for the talking heads?
@TechTechPotato
2 жыл бұрын
My video editor has a Human Segmentation AI filter as part of an add-on pack, and on top of that I use a human outline AI filter too
@ole7736
2 жыл бұрын
@@TechTechPotato Thanks!
@abowden556
2 жыл бұрын
Jesus Christ, if they can pull of this in order but might as well be out of order (without paying the out of order piper) thing, while also bieng a cpu, gpu, and tpu in one I will impressed.given the performance kind of want one, I kind wonder what 'full stack' game devs would be able to do with it... that's a lot power and versatility, and it doesn't strictly stop you using plugging one or multiple gpus in either, it has PCIE... might be good for pathfinding, regarding the future of certain workloads.
@ps3301
Жыл бұрын
It is vaporware !!
@10100rsn
2 жыл бұрын
T.ISA ?
@DGao-zz5vq
2 жыл бұрын
If this thing can come out within the next five years and demonstrate disruptive performance, I will comb my cat’s hair with a 5950X and upload the video to KZitem.
@FrankHarwald
2 жыл бұрын
So it seems this Tachyum fits into the category of a NoC architecture - Network on Chip, in particular a mesh-based NoC archtecture. This is something that I've seen in several different places over the last decades again & again & I was always wondering: This is a really great idea with so many advantages & only few obstacles, why hasn't any of these academic projects taken off into commercial scale? Really the only things that prevents them from becoming a thing is initial founding, use & development tools (compilers, languages) & the path dependencies that current homogenous CPUs have carved out.
@taktoa1
2 жыл бұрын
Most modern processors are NoCs, it's far from a theoretical concept.
@radivojevasiljevic3145
2 жыл бұрын
@@taktoa1 NOC in sense you have full routers, virtual channels & rest of interconnection network things, just on single chip and limited to 2D? No way. Small crossbar, yes, full NoC no. IBM Cell had ring, but was more than 15 years ago. If number of points is fairly small, crossbar is simplest and fastest solution.
@taktoa1
2 жыл бұрын
@@radivojevasiljevic3145 I was specifically thinking of large server CPUs like Epyc or Xeon; I'm pretty sure the increase in core count we've seen over the past decade has come from adopting more NoC-like designs. I guess I assumed that that filtered down to 8 core consumer CPUs too but I'm not surprised that you're saying they just use crossbars. But also, there's a sense in which ordinary ready-valid signalling is a type of NoC, and that really is ubiquitous. I work on an HLS tool that hopes to include NoC functionality, so maybe my view is biased.
@salty4
2 жыл бұрын
That was fast
@TheEVEInspiration
2 жыл бұрын
Lower the frequency, bandwidth problem solved ;).
@SIC66SIC66
2 жыл бұрын
I'll be honest Ian. Since you began your analyst/influencer thing, I question your objectivity almost every single video. Many videos have come across to me as just payed advertisements for the company in question, like IBM. I feel I can no longer blindly trust that what you say is unbiased. Hi Clam and Cheese btw ;)
@oraz.
2 жыл бұрын
Fusion research maybe
@transkryption
Жыл бұрын
just stick to Doritos, Everyone can be satisfied.
@Ivan-pr7ku
2 жыл бұрын
Oh dear, that VLIW thing again. Some people are still pushing DSPs as a CPU solution, as if Itanium didn't bend the VLIW concept enough and still failed.
@TechTechPotato
2 жыл бұрын
Except its not VLIW any more. That's the 2018 design which was canned. This is a 2022 design, which we explain in the video. In fact, that's the whole freaking point of the video.
@cbrunhaver
2 жыл бұрын
Interested analysis. However, the way the chips and cheese guy pronounced itanium sounds like he’s only read the word and never heard it pronounced. It’s like titanium without the T. Also saying “RISC Vee”.
@cornshobs
2 жыл бұрын
🖥🖱 WE CAN ONLY DREAM BUT... 👽👾🤖 I stumbled on this processor ( the T1-6928 Tachyum Prodigy ) a while back. ( Side note any humor relating to chip naming is hearsay lol T1-#### ) The creator also has a number of interesting patents made ( like many many patents! ) in relation to memory and storage amongst other things. I noticed that history involving said creator is too position himself within arms reach of any major player then in turn have his work sited and in-evidently bought out. No why in hell will this become production under his helm regardless of his history in the IT sector. All I hope is that once his paid for his "invention" whoever buys this out does not suffocate it on the back burner. "No one should limit us in the realm of possibilities. We can all play a part in innovation pressing forward." PEACE.
@SebLukaTech
2 жыл бұрын
Your avatar || profile pic reminds me of super sayan GOD mode blue. Very very impressive.
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