One of the best teacher I have came across. All of his videos are so simple and easy to understand.
@kshubham1
3 жыл бұрын
Kitne pyar se sir ne teach kiya hai maza aa gaya
@user-ww2lc1yo9c
2 жыл бұрын
Why use OR gate and not AND gate for clock gating, what am I missing here?
@sdeepak6555
6 ай бұрын
Very useful lecture.. thanks for uploading!
@souadechikh8843
2 жыл бұрын
Hello dear Professor , I appreciate you a lot for all your courses that are preparing for us to help us for growing in our research well,I would like to ask you some questions under 128Bit eFuse IP Design subject Problem statement: creating a convenable circuit that satisfied these specifications - Supply voltage: VDD=2.2V - VIO=5.5VTemperature:-40C 25 C to 125C Operating Mode :Program/Program Verify-Read/Read Program. -Program Verify Read:10k (PVR Mode) - Read Mode :5k {Read_Programmed Cell& Read_Uprogrammed Cell - Current :
@user-ww2lc1yo9c
2 жыл бұрын
Why does reducing the supply voltage, I mean the VDD, result in the circuit becoming slower.
@ssfaps
4 жыл бұрын
How does reducing the threshold voltage, reduce the static power? Doesn't make any sense since lower Vt leads to higher leakage.
@rohitkumaryadav712
4 жыл бұрын
Further he corrected that.
@surendralodhi8997
3 жыл бұрын
you told that static power can be reduced if we selectively use low thresold nMOS and pMOS devices, but we know that for LVT cells leakage will be more. so we should use HVT cells instead of LVT right?
@vkskaushal
3 жыл бұрын
true
@iammituraj
2 жыл бұрын
but HVT cells have higher dynamic power diss. So use HVT cells at chip regions having lesser switching activity.
@paavnishukla
2 жыл бұрын
Teachers like him are needed for the much needed clarity on VLSI basics . Really really grateful
@user-ww2lc1yo9c
2 жыл бұрын
This is the blessing of the holy cow
@dhaneshdprabhu8482
3 жыл бұрын
I like the way you teach. Complex but makes the understanding so each. The course or verilog, arm and now VLSI, all are amazing. Thanks swayam and nptel for this priceless gift
@sajankumar-ry6lt
2 жыл бұрын
arm? i cant find those
@dhaneshdprabhu8482
2 жыл бұрын
@@sajankumar-ry6lt Look for Embedded Systems with ARM. I think it's in some from IIT KGP
@user-ww2lc1yo9c
2 жыл бұрын
The transistors with lower Vth have higher leakage current, how come?
@user-ww2lc1yo9c
2 жыл бұрын
This is lecture 59, please put this into the video text
@YashN009
5 жыл бұрын
got v good basics knowledge about leakage reducing techniques. Thanks for the video
@user-ww2lc1yo9c
2 жыл бұрын
When transistors are stacked, won't each of them have its very own leakage current since they are all powered up so they can conduct? If they are never powered then how can they ever conduct? I did not get the part about the transistor stacking to reduce the leakage power.
@kabandajamir9844
9 ай бұрын
The world's best teacher thanks sir
@user-ww2lc1yo9c
2 жыл бұрын
adaptive body biasing (abb) and dynamic threshold scaling (dts), never heard of them before.
@lakshmi-kb4ww
Жыл бұрын
Thankyou so much sir. Great explanation
@PROGAMER-lu1nm
Жыл бұрын
Sir is from Computer science department and he is telling VLSI . It's great to hear from such people ☺️
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