"Processing-In-Memory for Efficient AI Inference at the Edge"
Kaiyuan Yang
Assistant Professor
Rice University
Weier Wan
Head of Software-Hardware Co-design
Aizip
Performing ever-demanding AI tasks in battery powered edge devices requires continuous improvement in AI hardware energy and cost-efficiency. Processing-In-Memory (PIM) is an emerging computing paradigm for memory-centric computations like deep learning. It promises significant energy efficiency and computation density improvements over conventional digital architectures, by alleviating the data movement costs and exploiting ultra-efficient low-precision computation in the analog domain. In this talk, Dr. Kaiyuan Yang will share his research group’s recent silicon-proven SRAM-based PIM circuit and system designs, CAP-RAM and MC2-RAM. Next, Dr. Weier Wan will introduce his recent RRAM-based PIM chip, NeuRRAM. Through full-stack algorithm-hardware co-design, these demonstrated PIM systems attempt to alleviate the critical inference accuracy loss associated with PIM hardware while retaining the desired energy, memory, and chip area benefits of PIM computing.
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